AWhat changed
Specified scalar/vector/matrix, logical, control and transfer instructions with programmer-visible scratchpads, allowing multiple neural-network techniques to share a compact accelerator ISA.
Scientific scope
Specified scalar/vector/matrix, logical, control and transfer instructions with programmer-visible scratchpads, allowing multiple neural-network techniques to share a compact accelerator ISA. Inherits RISC/load-store, vector operations and prior NN accelerators. The evaluation covers ten chosen neural techniques and a65nm implementation prototype, not all future networks or identical latency/energy on every workload. Operands remain bounded by scratchpad capacity and larger operations require compiler tiling. Cambricon affiliation does not retroactively turn the earlier ICT–Inria DianNao work into a company product.
Evidence
The linked original sources describe the stated contribution and its evidence limits. WRS has not independently rerun the experiments or certified a proof. Inherits RISC/load-store, vector operations and prior NN accelerators. The evaluation covers ten chosen neural techniques and a65nm implementation prototype, not all future networks or identical latency/energy on every workload. Operands remain bounded by scratchpad capacity and larger operations require compiler tiling. Cambricon affiliation does not retroactively turn the earlier ICT–Inria DianNao work into a company product.
Contributors
- Source-listed authors and technical contributors · SCIENCE: Source-listed authors or explicitly credited technical contributors for the cited versions. Family entries retain source-specific attribution; a combined list is not one original-paper byline or equal individual work. Names alone do not establish resolved identities.
Provisional WRS assessment, edition 2026-10-16.1. Independent expert calibration is pending. This grade does not certify correctness or assign ownership.
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