AWhat changed
Built a tensor-streaming processor around functional slices, producer-consumer streams and compiler-controlled cycle-level scheduling, explicitly managing computation and SRAM data movement.
Scientific scope
Built a tensor-streaming processor around functional slices, producer-consumer streams and compiler-controlled cycle-level scheduling, explicitly managing computation and SRAM data movement. Static scheduling/dataflow and tensor acceleration have predecessors. Determinism pertains to the compiled model, instruction/data schedule and stated hardware conditions, not arbitrary external services or all workloads. Original2020 ISCA implementation only; inaccessible2022 scale-out extension is not silently included. Source is an author-uploaded reproduction, not a new2022 publication or independently reproduced benchmark.
Evidence
The linked original sources describe the stated contribution and its evidence limits. WRS has not independently rerun the experiments or certified a proof. Static scheduling/dataflow and tensor acceleration have predecessors. Determinism pertains to the compiled model, instruction/data schedule and stated hardware conditions, not arbitrary external services or all workloads. Original2020 ISCA implementation only; inaccessible2022 scale-out extension is not silently included. Source is an author-uploaded reproduction, not a new2022 publication or independently reproduced benchmark.
Contributors
- Source-listed authors and technical contributors · SCIENCE: Source-listed authors or explicitly credited technical contributors for the cited versions. Family entries retain source-specific attribution; a combined list is not one original-paper byline or equal individual work. Names alone do not establish resolved identities.
Provisional WRS assessment, edition 2026-10-16.1. Independent expert calibration is pending. This grade does not certify correctness or assign ownership.
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