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Groq TSP: compile-time scheduled tensor-streaming architecture

Built a tensor-streaming processor around functional slices, producer-consumer streams and compiler-controlled cycle-level scheduling, explicitly managing computation and SRAM data movement.

What is recorded here?

Built a tensor-streaming processor around functional slices, producer-consumer streams and compiler-controlled cycle-level scheduling, explicitly managing computation and SRAM data movement.

Source-linked catalogue note. A detailed explanatory guide has not yet been prepared for this entry.

Scientific scope

Static scheduling/dataflow and tensor acceleration have predecessors. Determinism pertains to the compiled model, instruction/data schedule and stated hardware conditions, not arbitrary external services or all workloads. Original2020 ISCA implementation only; inaccessible2022 scale-out extension is not silently included. Source is an author-uploaded reproduction, not a new2022 publication or independently reproduced benchmark.

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People and systems

Dennis Abts; Jonathan Ross; Jonathan Sparling; Mark Wong-VanHaren; Max Baker; Tom Hawkins; Andrew Bell; John Thompson; Temesghen Kahsai; Garrin Kimmell; Jennifer Hwang; Rebekah Leslie-Hurd; Michael Bye; E. R. Creswick; Matthew Boyd; Mahitha Venigalla; Evan Laforge; Jon Purdy; Purushotham Kamath; Dinesh Maheshwari; Michael Beidler; Geert Rosseel; Omar Ahmad; Gleb Gagarin; Richard Czekalski; Ashay Rane; Sahil Parmar; Jeff Werner; Jim Sproch; Adrian Macias; Brian Kurtz

Source-listed authors or explicitly credited technical contributors for the cited versions. Family entries retain source-specific attribution; a combined list is not one original-paper byline or equal individual work. Names alone do not establish resolved identities.

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English catalogue narrative

Groq TSP: compile-time scheduled tensor-streaming architecture

Built a tensor-streaming processor around functional slices, producer-consumer streams and compiler-controlled cycle-level scheduling, explicitly managing computation and SRAM data movement.

Scientific scope

Static scheduling/dataflow and tensor acceleration have predecessors. Determinism pertains to the compiled model, instruction/data schedule and stated hardware conditions, not arbitrary external services or all workloads. Original2020 ISCA implementation only; inaccessible2022 scale-out extension is not silently included. Source is an author-uploaded reproduction, not a new2022 publication or independently reproduced benchmark.

Reading status

This is a source-linked WRS catalogue note. A full explanatory guide and independent scientific reconstruction have not been completed for this entry. Read the identified original work for its complete narrative and arguments.

People and systems

Dennis Abts; Jonathan Ross; Jonathan Sparling; Mark Wong-VanHaren; Max Baker; Tom Hawkins; Andrew Bell; John Thompson; Temesghen Kahsai; Garrin Kimmell; Jennifer Hwang; Rebekah Leslie-Hurd; Michael Bye; E. R. Creswick; Matthew Boyd; Mahitha Venigalla; Evan Laforge; Jon Purdy; Purushotham Kamath; Dinesh Maheshwari; Michael Beidler; Geert Rosseel; Omar Ahmad; Gleb Gagarin; Richard Czekalski; Ashay Rane; Sahil Parmar; Jeff Werner; Jim Sproch; Adrian Macias; Brian Kurtz

Source-listed authors or explicitly credited technical contributors for the cited versions. Family entries retain source-specific attribution; a combined list is not one original-paper byline or equal individual work. Names alone do not establish resolved identities.

Original sources