AWhat changed
A new neural-network operation may be easy to write as a formula yet slow to implement efficiently. Tensor Comprehensions provides a compact language for array calculations and a compiler that rearranges their loops, combines operations and specializes code for tensor shapes. An autotuner tries implementation choices and caches useful results. The work connects a high-level mathematical description to CUDA kernels and integrates with PyTorch and Caffe2 through ATen. Its contribution is this language, compiler and tuning pipeline, building on earlier polyhedral compilation, Halide and numerical libraries rather than replacing their authorship.
Scientific scope
A new neural-network operation may be easy to write as a formula yet slow to implement efficiently. Tensor Comprehensions provides a compact language for array calculations and a compiler that rearranges their loops, combines operations and specializes code for tensor shapes. An autotuner tries implementation choices and caches useful results. The work connects a high-level mathematical description to CUDA kernels and integrates with PyTorch and Caffe2 through ATen. Its contribution is this language, compiler and tuning pipeline, building on earlier polyhedral compilation, Halide and numerical libraries rather than replacing their authorship. The cited version targets CUDA and has explicit restrictions on range inference, recurrences and dynamic computation. Benchmark gains depend on tensor shapes, older GPU hardware and library versions; some large matrix multiplications are substantially slower than the vendor library. Autotuning itself consumes time and hardware. Selected kernel speedups are not an equal speedup of an entire training workload, and algebraic reduction semantics do not promise bit-identical floating-point results after reordering.
Evidence
The linked original works support the scoped statement and contribution attribution. WRS has not independently replayed experiments or reconstructed a full mathematical proof. The cited version targets CUDA and has explicit restrictions on range inference, recurrences and dynamic computation. Benchmark gains depend on tensor shapes, older GPU hardware and library versions; some large matrix multiplications are substantially slower than the vendor library. Autotuning itself consumes time and hardware. Selected kernel speedups are not an equal speedup of an entire training workload, and algebraic reduction semantics do not promise bit-identical floating-point results after reordering.
Contributors
- The named authors in the research record · SCIENCE: Source-listed human researchers and engineers for the exact method or resource. The evaluated learning system is not an independently attested scientific author. Earlier methods, funding and data-collection roles remain separate. Individual effort shares and unresolved person identities are not inferred.
Provisional WRS assessment, edition 2026-10-23.6. Independent expert calibration is pending. This grade does not certify correctness or assign ownership.
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