AWhat changed
Combined scalar control, vector processing and cube matrix engines with explicit memory transfers, configurable core sizes and hierarchy-aware resource balancing.
Scientific scope
Combined scalar control, vector processing and cube matrix engines with explicit memory transfers, configurable core sizes and hierarchy-aware resource balancing. Original HotChips2019four-person technical presentation, not the seven-author expanded2021 HPCA paper. Provider design/peak-area comparisons are scoped to chosen configurations, not universal system benchmarks. Matrix/vector balance, bandwidth, scratchpad capacity and software mapping constrain efficiency. This is Huawei DaVinci, not unrelated photonic architectures also named ASCEND.
Evidence
The linked original sources describe the stated contribution and its evidence limits. WRS has not independently rerun the experiments or certified a proof. Original HotChips2019four-person technical presentation, not the seven-author expanded2021 HPCA paper. Provider design/peak-area comparisons are scoped to chosen configurations, not universal system benchmarks. Matrix/vector balance, bandwidth, scratchpad capacity and software mapping constrain efficiency. This is Huawei DaVinci, not unrelated photonic architectures also named ASCEND.
Contributors
- Source-listed authors and technical contributors · SCIENCE: Source-listed authors or explicitly credited technical contributors for the cited versions. Family entries retain source-specific attribution; a combined list is not one original-paper byline or equal individual work. Names alone do not establish resolved identities.
Provisional WRS assessment, edition 2026-10-16.1. Independent expert calibration is pending. This grade does not certify correctness or assign ownership.
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