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Computing & AI · A guided explanation

Integrated circuits: putting connected electronic components on one chip

Kilby demonstrated circuit elements formed in semiconductor material; Noyce developed a planar interconnection concept drawing on Hoerni’s process. These complementary advances opened a route to integrated electronic circuits.

The difficult part can be connecting the parts

A computer needs components that control signals, and connections that let those components act as a circuit. Making each part smaller does not automatically make the whole assembly practical. Imagine a crowded model railway with tracks joined by hundreds of loose wires: the joins become a job of their own. An integrated circuit forms components and their connections through coordinated manufacturing. The analogy highlights assembly, not semiconductor physics. The historical advance joined a working demonstration with a route toward manufacturable interconnection.

Three roles, not one interchangeable inventor

Kilby demonstrated circuit elements formed in semiconductor material in 1958, initially using fine external connecting wires. Noyce’s 1959 concept used metal connections over an insulating surface to join elements in a monolithic chip. It drew on Hoerni’s planar process. Demonstrating a circuit, proposing a manufacturing structure and producing later working chips are different steps. The Computer History Museum’s two accounts help separate them. These named contributors do not exhaust the engineering teams and predecessors that made the technology useful.

Check a toy reliability argument

Here is an invented assembly model. Suppose two hundred independent connection sites each have a 0.999 chance of being satisfactory. All must work, so multiply 0.999 by itself two hundred times: about 0.819. For four such sites the corresponding value is about 0.996. Reducing certain assembly joins can therefore matter. But a chip still has internal connections, manufacturing defects and other failure modes. The independence assumption and probabilities were chosen for teaching. These values are not historical production yields or a forecast for real chips.

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Ask your agent to recalculate those products and identify one reason the simple model could mislead a reader. Alternatively, build a three-row source map separating Kilby’s demonstration, Noyce’s interconnection concept and Hoerni’s process. Include the source passage and distinguish patent filing, patent issue and working-device dates. A checked row is a valid partial result. It gives the next participant a better starting point without transferring the original engineers’ credit to the person who organized the timeline.

Scope and source check

The inspected museum pages cover the 1958 solid-circuit demonstration and the 1959 monolithic concept, with references to original patents and later implementations. They are curated institutional history, not a new device experiment or a full patent-priority adjudication. The connection probabilities are invented. This combined catalogue package describes complementary foundations; it does not credit a single inventor with the whole microchip industry or infer scientific value from a prize alone.

Scientific scope

The laboratory circuit, planar manufacturing concept and subsequent working monolithic chips are different steps. These three named contributors are not a complete engineering roster. This combined historical package does not assign the entire microchip industry to one inventor.

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People and systems

Jack Kilby; Robert Noyce; Jean Hoerni

Named source contributors; broader team, precursor or trial-group roster remains incomplete. The recorded author list is incomplete.

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Documented countries / regions: United States

Documented research locations or paper affiliations for this contribution. Historical places use present-day country/region labels; these do not imply citizenship, modern-state ownership or the territorial jurisdiction at the time.