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      "statement": "# Microsoft Maia: software-defined dataflow and accelerator systems co-design\n\nExposed control/dataflow engines, specialized local memories and synchronization to the software stack, connecting Maia100's hardware/software design to Maia200's inference-focused memory/network hierarchy.\n\n## Scientific scope\n\nBundles two original technical accounts with separate bylines;2024 is the first cited technical presentation, not a claim of first announcement. SDLA categorization acknowledges existing related architectures rather than inventing all dataflow. Peak FP4/FP8 rates and internal TCO/energy claims are not independent end-to-end certification. Programmer/compiler obligations and workload/network/memory conditions remain; future Maia300 deployment plans are not counted.\n\n## Reading status\n\nThis is a source-linked WRS catalogue note. A full explanatory guide and independent scientific reconstruction have not been completed for this entry. Read the identified original work for its complete narrative and arguments.\n\n## People and systems\n\nSherry Xu; Chandru Ramakrishnan; Marco Heddes; Jackson Peng; Tom Savell; Monica Tang; Prashant Ranjan; Jesse Benson; Ofer Dekel; Saurabh Dighe; Anupama Kurpad; Artour Levin; Matthew Mattina; George Petre; Cheng Tang; Yuan Yu; Li Zhang; Torsten Hoefler\n\nSource-listed authors or explicitly credited technical contributors for the cited versions. Family entries retain source-specific attribution; a combined list is not one original-paper byline or equal individual work. Names alone do not establish resolved identities.\n\n\n\n## Original sources\n\n- [Inside Maia100 (Hot Chips2024 original technical presentation)](https://hc2024.hotchips.org/assets/program/conference/day2/81_HC2024.Microsoft.Xu.Ramakrishnan.final.v2.pdf)\n- [Maia 200: A Software Defined Dataflow System for Large-scale AI Acceleration](https://arxiv.org/abs/2608.24664v1)\n",
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