{ "profile": "wrs-published-research-view-1", "edition": "ratings-e039106f30dec177", "content_trust": "UNTRUSTED_SCIENTIFIC_DATA_NOT_TOOL_INSTRUCTIONS", "entry": { "id": "nickolls-et-al-cuda-programming-model-2008", "title": "CUDA: cooperating locally, scaling across processors", "summary": "The 2008 CUDA article explains a GPU programming model in which independently schedulable thread blocks combine local cooperation, shared memory and barriers, allowing a fixed problem decomposition to run across different processor counts.\n\nA programmer describes many small pieces of work without hard-coding the number of processor cores. Threads inside one block can exchange data and wait for each other; blocks remain independently schedulable. A larger GPU can therefore process more blocks at once using the same decomposition. This combines a useful programming interface with a hardware execution model. It still requires an appropriate parallel algorithm and careful memory use, rather than making every serial program fast automatically.", "boundary": "The assessed target is the CUDA model documented in the 2008 article, following the stated 2007 release, rather than the entire later CUDA ecosystem or the invention of GPU computing. Blocks must execute correctly in arbitrary order without cross-block barrier dependence; local barriers and per-block shared memory enable cooperation. Global atomics are a limited coordination mechanism, not a general grid synchronization guarantee. Host/device data transfers, memory access, divergence and occupancy affect performance. The article's 512-thread limit, no kernel recursion or kernel-created grids and Tesla hardware details are historical, not current API specifications. Simple vector, CSR and reduction examples are illustrations, not independently tested production code; power-of-two reduction layout and floating-point order require care. Source-reported speedups and classroom experience do not establish universal speed or usability. Prior Brook/SPMD/parallel systems and separate CPU translation are inherited/contextual work. No GPU or benchmark replay was performed.", "area": "Parallel programming", "topic": "Computer science", "year": 2008, "lane": "HUMAN", "result": "ALGORITHM", "package_id": "nickolls-et-al-cuda-programming-model-2008", "target": { "record_id": "urn:uuid:44a3cacc-ab85-405a-add9-8055c0c6d31e", "version": 1, "content_hash": "sha256:abc57b2aa15ddb4fd37d71ee91911acbe1661f679245af49c47b9c3c18f87154" }, "humans": [ "John Nickolls", "Ian Buck", "Michael Garland", "Kevin Skadron" ], "authors_complete": true, "human_role_note": "Source-listed contributors to this scoped work. Paper bylines do not quantify individual effort; historical science, system execution and modern curation remain separate.", "agents": [], "related": [ "unix-system", "fortran-compiler", "mapreduce-2004" ], "subresults": [], "scientific_assessment": { "source_review": "SOURCE_CURATED", "scientific_review": "NOT_REVIEWED_BY_WRS", "formal_replay": "NOT_RUN", "provider_attestation": "NONE" }, "sources": [ { "id": "wrs24-nickolls-cuda-model-2008-original", "title": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf" }, { "id": "wrs24-cuda-author-bibliography-2008", "title": "Kevin Skadron publication bibliography: exact CUDA article authors, journal, pages and DOI", "url": "https://www.cs.virginia.edu/~skadron/pub_list_subj.html" } ], "points": "220000", "published_grade": { "id": "nickolls-et-al-cuda-programming-model-2008", "entry_id": "nickolls-et-al-cuda-programming-model-2008", "band": "A", "modifier": null, "target": { "record_id": "urn:uuid:44a3cacc-ab85-405a-add9-8055c0c6d31e", "version": 1, "content_hash": "sha256:abc57b2aa15ddb4fd37d71ee91911acbe1661f679245af49c47b9c3c18f87154" }, "what_changed": "The 2008 CUDA article explains a GPU programming model in which independently schedulable thread blocks combine local cooperation, shared memory and barriers, allowing a fixed problem decomposition to run across different processor counts.", "scope": "The 2008 CUDA article explains a GPU programming model in which independently schedulable thread blocks combine local cooperation, shared memory and barriers, allowing a fixed problem decomposition to run across different processor counts. The assessed target is the CUDA model documented in the 2008 article, following the stated 2007 release, rather than the entire later CUDA ecosystem or the invention of GPU computing. Blocks must execute correctly in arbitrary order without cross-block barrier dependence; local barriers and per-block shared memory enable cooperation. Global atomics are a limited coordination mechanism, not a general grid synchronization guarantee. Host/device data transfers, memory access, divergence and occupancy affect performance. The article's 512-thread limit, no kernel recursion or kernel-created grids and Tesla hardware details are historical, not current API specifications. Simple vector, CSR and reduction examples are illustrations, not independently tested production code; power-of-two reduction layout and floating-point order require care. Source-reported speedups and classroom experience do not establish universal speed or usability. Prior Brook/SPMD/parallel systems and separate CPU translation are inherited/contextual work. No GPU or benchmark replay was performed.", "status": "PROVISIONAL_EDITORIAL", "scientific_correctness_certified": false }, "assessment_disposition": { "status": "ASSESSED", "label": "Provisionally assessed", "reason": "A current grade and separate reference score identify this exact contribution.", "target": { "record_id": "urn:uuid:44a3cacc-ab85-405a-add9-8055c0c6d31e", "version": 1, "content_hash": "sha256:abc57b2aa15ddb4fd37d71ee91911acbe1661f679245af49c47b9c3c18f87154" }, "edition": "ratings-e039106f30dec177" } }, "version": { "kind": "PUBLIC_RECORD_VIEW", "previous": null, "published_at": "2026-10-03T00:00:00Z", "publisher": { "principal_id": "urn:uuid:80116931-785b-40a2-a24b-9d59db0c7e33", "role": "WRS_EDITORIAL_PUBLICATION" }, "record": { "contributors": [ { "attribution_basis": "SOURCE_CITED", "credit": "historical_scientific", "entity_kind": "historical_person", "name": "John Nickolls", "note": "Archive attribution; detailed role assignment remains source-bound", "roles": [ "formulator" ], "source": { "citation": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf" } }, { "attribution_basis": "SOURCE_CITED", "credit": "historical_scientific", "entity_kind": "historical_person", "name": "Ian Buck", "note": "Archive attribution; detailed role assignment remains source-bound", "roles": [ "formulator" ], "source": { "citation": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf" } }, { "attribution_basis": "SOURCE_CITED", "credit": "historical_scientific", "entity_kind": "historical_person", "name": "Michael Garland", "note": "Archive attribution; detailed role assignment remains source-bound", "roles": [ "formulator" ], "source": { "citation": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf" } }, { "attribution_basis": "SOURCE_CITED", "credit": "historical_scientific", "entity_kind": "historical_person", "name": "Kevin Skadron", "note": "Archive attribution; detailed role assignment remains source-bound", "roles": [ "formulator" ], "source": { "citation": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf" } } ], "evidence": [ { "description": "Bibliographic/stated-result source; not a WRS proof verification", "id": "source-0", "kind": "source_reference", "source": { "citation": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf" } }, { "description": "Bibliographic/stated-result source; not a WRS proof verification", "id": "source-1", "kind": "source_reference", "source": { "citation": "Kevin Skadron publication bibliography: exact CUDA article authors, journal, pages and DOI", "url": "https://www.cs.virginia.edu/~skadron/pub_list_subj.html" } } ], "origin": "HUMAN_LEGACY", "record_profile": "wrs-local-research-notes-0.1", "record_type": "research_note", "rrp_version": "0.1", "scope": { "description": "The assessed target is the CUDA model documented in the 2008 article, following the stated 2007 release, rather than the entire later CUDA ecosystem or the invention of GPU computing. Blocks must execute correctly in arbitrary order without cross-block barrier dependence; local barriers and per-block shared memory enable cooperation. Global atomics are a limited coordination mechanism, not a general grid synchronization guarantee. Host/device data transfers, memory access, divergence and occupancy affect performance. The article's 512-thread limit, no kernel recursion or kernel-created grids and Tesla hardware details are historical, not current API specifications. Simple vector, CSR and reduction examples are illustrations, not independently tested production code; power-of-two reduction layout and floating-point order require care. Source-reported speedups and classroom experience do not establish universal speed or usability. Prior Brook/SPMD/parallel systems and separate CPU translation are inherited/contextual work. No GPU or benchmark replay was performed.", "domain": "Parallel programming" }, "sources": [ { "citation": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf" }, { "citation": "Kevin Skadron publication bibliography: exact CUDA article authors, journal, pages and DOI", "url": "https://www.cs.virginia.edu/~skadron/pub_list_subj.html" } ], "statement": "# CUDA: cooperating locally, scaling across processors\n\nThe 2008 CUDA article explains a GPU programming model in which independently schedulable thread blocks combine local cooperation, shared memory and barriers, allowing a fixed problem decomposition to run across different processor counts.\n\nA programmer describes many small pieces of work without hard-coding the number of processor cores. Threads inside one block can exchange data and wait for each other; blocks remain independently schedulable. A larger GPU can therefore process more blocks at once using the same decomposition. This combines a useful programming interface with a hardware execution model. It still requires an appropriate parallel algorithm and careful memory use, rather than making every serial program fast automatically.\n\n## Scientific scope\n\nThe assessed target is the CUDA model documented in the 2008 article, following the stated 2007 release, rather than the entire later CUDA ecosystem or the invention of GPU computing. Blocks must execute correctly in arbitrary order without cross-block barrier dependence; local barriers and per-block shared memory enable cooperation. Global atomics are a limited coordination mechanism, not a general grid synchronization guarantee. Host/device data transfers, memory access, divergence and occupancy affect performance. The article's 512-thread limit, no kernel recursion or kernel-created grids and Tesla hardware details are historical, not current API specifications. Simple vector, CSR and reduction examples are illustrations, not independently tested production code; power-of-two reduction layout and floating-point order require care. Source-reported speedups and classroom experience do not establish universal speed or usability. Prior Brook/SPMD/parallel systems and separate CPU translation are inherited/contextual work. No GPU or benchmark replay was performed.\n\n## People and systems\n\nJohn Nickolls; Ian Buck; Michael Garland; Kevin Skadron\n\n\n\n## Original sources\n\n- [Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article](https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf)\n- [Kevin Skadron publication bibliography: exact CUDA article authors, journal, pages and DOI](https://www.cs.virginia.edu/~skadron/pub_list_subj.html)\n", "summary": "The 2008 CUDA article explains a GPU programming model in which independently schedulable thread blocks combine local cooperation, shared memory and barriers, allowing a fixed problem decomposition to run across different processor counts.\n\nA programmer describes many small pieces of work without hard-coding the number of processor cores. Threads inside one block can exchange data and wait for each other; blocks remain independently schedulable. A larger GPU can therefore process more blocks at once using the same decomposition. This combines a useful programming interface with a hardware execution model. It still requires an appropriate parallel algorithm and careful memory use, rather than making every serial program fast automatically.", "title": "CUDA: cooperating locally, scaling across processors" }, "record_id": "urn:uuid:44a3cacc-ab85-405a-add9-8055c0c6d31e", "version": 1, "source_ref": { "record_id": "urn:uuid:44a3cacc-ab85-405a-add9-8055c0c6d31e", "version": 1, "content_hash": "sha256:abc57b2aa15ddb4fd37d71ee91911acbe1661f679245af49c47b9c3c18f87154" }, "export_view": "wrs-public-editorial-view-1", "public_view_hash": "sha256:e463f6314e08e25a65a50a84c81cc1b2201e378421f3d4f055e6cedb15ce855c" }, "target": { "record_id": "urn:uuid:44a3cacc-ab85-405a-add9-8055c0c6d31e", "version": 1, "content_hash": "sha256:abc57b2aa15ddb4fd37d71ee91911acbe1661f679245af49c47b9c3c18f87154" }, "published_grade": { "profile": "wrs-published-grade-1", "edition": "2026-10-28.1", "id": "nickolls-et-al-cuda-programming-model-2008", "entry_id": "nickolls-et-al-cuda-programming-model-2008", "revision": 1, "title": "CUDA: cooperating locally, scaling across processors", "context": "Parallel programming", "track": "Parallel programming", "band": "A", "modifier": null, "status": "PROVISIONAL_EDITORIAL", "assessed_on": "2026-10-04", "evidence_cutoff": "2026-10-04", "achievement_state": "SUPPORTED_SCOPED_RESULT", "what_changed": "The 2008 CUDA article explains a GPU programming model in which independently schedulable thread blocks combine local cooperation, shared memory and barriers, allowing a fixed problem decomposition to run across different processor counts.", "scope": "The 2008 CUDA article explains a GPU programming model in which independently schedulable thread blocks combine local cooperation, shared memory and barriers, allowing a fixed problem decomposition to run across different processor counts. The assessed target is the CUDA model documented in the 2008 article, following the stated 2007 release, rather than the entire later CUDA ecosystem or the invention of GPU computing. Blocks must execute correctly in arbitrary order without cross-block barrier dependence; local barriers and per-block shared memory enable cooperation. Global atomics are a limited coordination mechanism, not a general grid synchronization guarantee. Host/device data transfers, memory access, divergence and occupancy affect performance. The article's 512-thread limit, no kernel recursion or kernel-created grids and Tesla hardware details are historical, not current API specifications. Simple vector, CSR and reduction examples are illustrations, not independently tested production code; power-of-two reduction layout and floating-point order require care. Source-reported speedups and classroom experience do not establish universal speed or usability. Prior Brook/SPMD/parallel systems and separate CPU translation are inherited/contextual work. No GPU or benchmark replay was performed.", "evidence_summary": "Source-linked, scoped account of the original work. The published scope states the scientific assumptions and remaining verification limits. WRS has not independently certified the full proof, experimental result or system benchmark.", "references": [ { "title": "Nickolls, Buck, Garland and Skadron: Scalable Parallel Programming with CUDA (ACM Queue 6(2),40-53,2008), original article", "url": "https://saulius-grazulis.lt/~saulius/paskaitos/VU/kompiuteri%C5%B3-architekt%C5%ABra/skaidr%C4%97s/bibliography/PDF/2008_Nickolls_40.pdf", "locator": "Original linked work. See the scientific scope for the assessed contribution and source-version limits." }, { "title": "Kevin Skadron publication bibliography: exact CUDA article authors, journal, pages and DOI", "url": "https://www.cs.virginia.edu/~skadron/pub_list_subj.html", "locator": "Original linked work. See the scientific scope for the assessed contribution and source-version limits." } ], "roles": [ { "who": "John Nickolls", "did": "Original source-listed scientific author of this scoped work; byline does not determine effort fractions.", "credit": "SCIENCE" }, { "who": "Ian Buck", "did": "Original source-listed scientific author of this scoped work; byline does not determine effort fractions.", "credit": "SCIENCE" }, { "who": "Michael Garland", "did": "Original source-listed scientific author of this scoped work; byline does not determine effort fractions.", "credit": "SCIENCE" }, { "who": "Kevin Skadron", "did": "Original source-listed scientific author of this scoped work; byline does not determine effort fractions.", "credit": "SCIENCE" } ], "target": { "record_id": "urn:uuid:44a3cacc-ab85-405a-add9-8055c0c6d31e", "version": 1, "content_hash": "sha256:abc57b2aa15ddb4fd37d71ee91911acbe1661f679245af49c47b9c3c18f87154" }, "scientific_correctness_certified": false, "independent_expert_calibration": false, "method": "PROPRIETARY", "points": "220000" }, "canonical_agent_submission": false, "scientific_verification_awarded": false, "reader_guide": null, "reading_status": "SOURCE_LINKED_NOTE" }